As you may have noticed, the work of this blog is based on the great FpgaTools project . I understood the functionning of the Xilinx Spartan-6 bitstream by reading the source code of this project. The source code is nicely written in plain C-code, but there are not much comments or design explanations. Still there is no copy&paste to my own code, because I wanted to really understand everything, and also because my project targets heapless embedded processing (no malloc or any dynamic memory allocation). Nevertheless, I tried to use FpgaTools at the beginning. Here is my experience.
FpgaTools quick experience
The hello world found in the sources of FpgaTools cannot be used directly on my own Spartan-6 development board , because the pins (P45, P46 and P48) are not free (they are hardwired to the SRAM chip). Therefore, I tried to change the pins assignment. Unfortunately, I failed to find other pins that would allow me to generate the bitstream successfully. I kept getting an error message from fpga_switch_2sets_add(). It seems that the resolution failed for the routing between the output pins and the internal LUT. I haven't inverstigated further since it was not actually needed for my project.
I wrote this quick post to share that it is expected to face routing issues with FpgaTools. The project is very advanced but not able to solve solve all routing requests like the official Xilinx place-and-route tool does.
|||FpgaTools GitHub repository, https://github.com/Wolfgang-Spraul/fpgatools|
|||Taobao (淘宝网), Spartan-6 dev. board: http://item.taobao.com/item.htm?id=18607210429|