Config/program access

Microcontroller debug. access over SWD. The STM32F4x CPU is found:

Open On-Chip Debugger 0.8.0 (2014-05-10-23:20)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.sourceforge.net/doc/doxygen/bugs.html
Info : This adapter doesn't support configurable speed
Info : STLINK v2 JTAG v17 API v2 SWIM v0 VID 0x0483 PID 0x3748
Info : using stlink api v2
Info : Target voltage: 2.870699
Info : stm32f4x.cpu: hardware has 6 breakpoints, 4 watchpoints

FPGA config. access over JTAG. The Spartan-6 LX9 core is found:

INFO:iMPACT - Current time: 11.05.15 07:52
Maximum TCK operating frequency for this device chain: 1000000.
Validating chain...
Boundary-scan chain validated successfully.
'1': IDCODE is '00100100000000000001000010010011'
'1': IDCODE is '24001093' (in hex).
'1': : Manufacturer's ID = Xilinx xc6slx9, Version : 2

The "blinking LED" video of victory!

http://vjordan.info/flr/p1/alive.mp4

What happens here?

Two LEDs are controlled by the microcontroller board, two LEDs are controlled by the FPGA board. The microcontroller sends its LED "clock" to the FPGA using a board-to-board interconnect. The FPGA implements a simple logic configuration. No FPGA standalone configuration is happenning yet (either static or dynamic). It just sows that both PCBs are working, everything fits as planned in the selected enclosure, and I am able the configure/program each bord separately... to sum up: the hardware works!

Pinout references

This is just for me, to remember how to connect everything up

On the STM32F4 discovery board, the external SWD connector pinout (from [UM1670]):

A standard JTAG pinout (inspied from Olimex ST dev. boards at [1]):

FLRe microcontroller board JTAG pinout (custom for this project):

FLRe FPGA board JTAG pinout (custom for this project):

References