Partial reconfiguration of Xilinx Spartan 6 LX9 over JTAG

It finally works!

The LUT equation is updated live on the FPGA.

Source code is available at pikacode: See "initial commit" at https://pikacode.com/vjp/fpgalivereprog/files/fb59f69719af90ef9083ea7774fd9f92d42c1084