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Intel debug port for Atom

Fr 01 Januar 2016
By vjp

In other.

tags: atom

How to debug an Atom processor over JTAG?

Official presentation of the "Intel JTAG debugger" is [1].

The standard Intel debug port is the 60-pin XDP (eXtended Debug Port). It extends JTAG with additional signals. This port also has a lower pin count variant: the 31-pin XDP-SSA (Second Side Attach, designed to be on the other side of the board, where there are less components), and an even lower pin count variant: the 24-pin flex edge connector XDP-SFF-24. See [2] for a comparison among other debug ports (e.g., ARM, Nexus, ...). See [3] for guidelines regarding the physical layout of the XDP port. XDP pinout on page 23.

XDP includes an I²C line for SMB (System Management Bus).

XDP includes one or several observation ports (OBSFN_*, previously named "Breakpoint Monitor" BPM). Four are availables on the stardard 60-pin XDP, while only one is available on the 31-pin XDP-SSA.

Finding a dev. board with XDP access

The MinnowBoard features an Intel Atom Bayrail SoC processor ready to support Yocto Linux projects. See [4]. An improved version can be bought there [5]. The "High Speed Expansion Connector" gives access to some XDP lines such as the JTAG port and one observation port. There is even a breakout board (names "Lure" in this project) to route the signals to a more standard XDP connector, see [6].

Functionalities of Intel on-chip debug

The documentation of the Lauterbach debugger for Intel x86/x64 [7] gives a list of many available functionalities. See [8] and [9] for details regarding traces.

References

[1]Intel, "Intel® JTAG Debugger", https://software.intel.com/sites/default/files/managed/d6/39/10-jtag-debugger-2014.pdf
[2]Intel, "JTAG 101 IEEE 1149.x and Software Debug", http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/jtag-101-ieee-1149x-paper.pdf
[3]Intel, "DPDG for UP/DP Systems", http://download.intel.com/support/processors/pentium4/sb/31337301.pdf
[4]MinnowBoard, "MinnowBoard MAX", http://wiki.minnowboard.org/MinnowBoard_MAX
[5]MinnowBoard, "MinnowBoard Turbot", http://store.netgate.com/Turbot.aspx
[6]MinnowBoard, "IDP JTAG Lure", http://wiki.minnowboard.org/IDP_JTAG_Lure
[7]Lauterbach, "Basic Debugging Intel® x86/x64", http://www.lauterbach.com/pdfnew/training_debugger_x86.pdf
[8]Lauterbach, "Intel x86/x64 Debugger", http://www2.lauterbach.com/pdf/debugger_x86.pdf
[9]Lauterbach, " Intel® Processor Trace Training", http://www.lauterbach.com/pdfnew/training_ipt_trace.pdf

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This blog is about building a hardware and software platform based on the Xilinx Spartan-6 LX9 to demonstrate FPGA live reconfiguration, i.e., changing the FPGA configuration while the FPGA is "running". The goal is to implement self-adapting configurations (e.g., softcore) able to balance silicon usage according to the current task at runtime.

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