So 22 März 2015
Kevin Modzelewski made a little breakout board for the Xilinx Spartan-6 in TQG-144 package. He describes his FPGA project here , and he gives the Gerber source there .
This simple board is useful to learn about the Spartan-6 and test your soldering skills before starting a more ambitious project.
Kevin Modzelewski does not give the schematics/bill of material for its breakout board, but it is pretty easy to find out
what goes where. I selected the following components for my own test:
XILINX, XC6SLX9 in TQG-144 pin package,
http://www.digikey.de/product-detail/de/XC6SLX9-2TQG144C/122-1745-ND/2339919 ST, LDO 3.3V regulator SOT223-3,
http://www.tme.eu/en/details/ld1117as33/ldo-unregulated-voltage-regulators/st-microelectronics/ld1117as33tr/ TEXAS INSTRUMENTS, LDO 1.2V regulator SOT23-5,
http://www.tme.eu/en/details/tps73601dbvtg4/ldo-unregulated-voltage-regulators/texas-instruments/ or http://www.digikey.de/product-detail/de/MIC5365-1.2YD5%20TR/576-4081-1-ND/3671749 YAGEO, SMD capacitor 10uF,
http://www.tme.eu/en/details/cc0805kkx5r5106/0805-mlcc-smd-capacitors/yageo/cc0805kkx5r5bb106/ SAMSUNG, SMD capacitor 4.7uF (0805),
http://www.tme.eu/en/details/cl21a475kofnnng/0805-mlcc-smd-capacitors/samsung/ SAMSUNG, SMD capacitor 470nF (0603),
http://www.tme.eu/en/details/cl10b474ko8nnnc/0603-mlcc-smd-capacitors/samsung/ CONNFLY, pin header,
Yes, I have made a mistake, and I ordered the 470nF decoupling capacitors in the wrong size. For a quick test, they are not mandatory.
Be very careful to solder the FPGA in the correct orientation.
If everything is fine, it is possible to read the FPGA id over JTAG using the
Xilinx Plateform cable. Only power supply and JTAG connections are required.
To see what is connected to what, see the
[UG385] v2.3 at p. 274: Figure 3-1: TQG144 Package—LX4 and LX9 Pinout Diagram.
FLRe and Spartan-6
And it also works with my own custom JTAG interface for FPGA live reconfiguration!
On start-up, the target FPGA is identified as:
CTL (BITS): 0x0081
STAT (BITS): 0x1704
COR1 (BITS): 0x3700
COR2 (BITS): 0x09EE
I have 2-3 spare PCB. Write me if you want one for free.
You have an interesting blog. I was wondering whether you had the source(eagle) for the spartan 6 breakout that you have talked about on your site? How did you find out voltage regualtors to use? I cant find the eagle source on kevin's site.
Unfortunately, I haven't the Eagle source file. I found the values of the voltage regulators in the manual of the Spartan-6: 3.3V for the I/O and 1.2V for the core, and I guessed the component packages from the footprints in the gerber file. The big SOT223-3 package is the 3.3V, and the smaller SOT23-5 is the 1.2V regulator.
This blog is about building a hardware and software platform based on the
Xilinx Spartan-6 LX9 to demonstrate
FPGA live reconfiguration, i.e., changing the FPGA configuration while the FPGA is "running". The goal is to implement self-adapting configurations (e.g., softcore) able to balance silicon usage according to the current task at runtime.
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