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Thinking about going USB

Mo 17 August 2015
By vjp

In other.

tags: usb

The USB specs are pretty large.

Specifications

USB 2.0 specs [1]. Explanations [2].

Good description of the protocol [3].

Another source [4].

Protocol analyzers

USB communications can be spyed with:

Software Wireshark (example video there [5]).

Hardware OpenVizsla An Open-source FPGA-based USB sniffer [6]... based of the Xilinx Spartan 6 LX9 TQFP144 (nice choice!).

About the STM32F1

The IP cores for STM32F1xx are not consistent among all versions:

  • STM32F103xx (medium density, performance line) and STM32F102xx (medium density, USB access line): USB "USB full-speed device interface". (seems like made by ST)
  • STM32F105xx and STM32F107xx (connectivity line): OTG_FS "USB on-the-go full-speed". (seems like bought at Synopsys)

For the USB ip, the user manual is UM0424 [7]. Note that the standard ST all-in-one header file for register definitions (stm32f10x.h) cannot be used alone because the registers for USB are not defined. You have to add you own header. For example, ChibiOS/RT did it there [8].

References

[1]USB 2.0 specifications, http://www.usb.org/developers/docs/usb_20.zip
[2]USB Made Simple, http://www.usbmadesimple.co.uk
[3]USB in a NutShell, USB Protocols, http://www.beyondlogic.org/usbnutshell/usb3.shtml
[4]SiliconLab, http://www.silabs.com/Support%20Documents/Software/USB_Overview.pdf
[5]OpensourceH4ck3r, How to reverse engineer a USB protocol for Linux, https://www.youtube.com/watch?v=GdvmsWnZkyc
[6]OpenVizsla, project homepage, http://openvizsla.org/
[7]STM32 USB-FS-Device development kit, http://www.st.com/st-web-ui/static/active/cn/resource/technical/document/user_manual/CD00158241.pdf
[8]ChibiOS/RT, stm32_usb.h, http://chibios.sourceforge.net/docs/hal_stm32l1xx_rm/stm32__usb_8h_source.html

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This blog is about building a hardware and software platform based on the Xilinx Spartan-6 LX9 to demonstrate FPGA live reconfiguration, i.e., changing the FPGA configuration while the FPGA is "running". The goal is to implement self-adapting configurations (e.g., softcore) able to balance silicon usage according to the current task at runtime.

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